CMOS Logic Circuits using Maximum Likelihood Estimation
Shamsul Silva
Corresponding
NED University of Engineering and Technology, Karachi
Fatima Mukherjee
Bangladesh Agricultural University
Abstract
The performance of automotive engines in service is closely linked to the quality of CMOS logic circuits. Field measurements obtained from automotive engines are used to verify the theoretical predictions. A throughput improvement of 18% is obtained without any additional capital expenditure being required. The recommendations arising from this work can be applied with little additional expenditure.
Keywords:
CMOS logic circuitsmaximum likelihood estimationsoil mechanicsphase-locked loopoptimisation
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